石墨烯
材料科学
制作
纳米技术
氧化物
范德瓦尔斯力
电极
光电子学
异质结
氧化石墨烯纸
电子迁移率
电介质
限制
晶体管
场效应晶体管
电压
化学
电气工程
分子
医学
机械工程
替代医学
有机化学
物理化学
病理
工程类
冶金
作者
Hyewon Du,Seonyeong Kim,Taekwang Kim,Somyeong Shin,Minho Song,Hansung Kim,Dain Kang,Yun Sung Woo,Sunae Seo
标识
DOI:10.35848/1882-0786/abf94c
摘要
Abstract In order to fully utilize the excellent electrical properties of graphene as an electrode, it is essential to preserve the nature of pristine graphene. However, structural defects or polymer residues during the conventional fabrication steps are inevitable, severely limiting device performance. To overcome these issues, we used a seamless lateral graphene–graphene oxide (GO)-graphene layer fabricated by oxidation scanning probe lithography as electrodes of the MoS 2 field-effect transistor. We demonstrated residue-free and flawless graphene surfaces and furthermore GO interlayer between the MoS 2 and gate dielectric reduces interface roughness and screens interface traps, leading to improved electron injection and carrier mobility.
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