Influence of Underfill and EMC Material Properties on Bump Stresses in 2.5D CoWoS Packaging

As Moore’s Law approaches the physical limit, advanced packaging, such as the 2.5D Chip on Wafer on Substrate (CoWoS), addresses the bottlenecks but faces intensified thermal stress challenges in heterogeneous material systems. This study employed finite element analysis (FEA) to evaluate the impact of silica filler content in underfill and epoxy molding compound (EMC) materials on thermal stress. Thermal stress analysis revealed stress distribution patterns in the package, showing pronounced stress concentrations at copper pillars with solder cap (C2) bumps and controlled collapse chip connection (C4) bumps. Orthogonal experiments identified EMC as the dominant factor for C2 bumps and underfill in C4 bump layer (UFC4) for C4 bumps through range analysis, with increased filler content in these materials substantially reducing corresponding bump stresses. The optimal material configuration, combining underfill in C2 bump layer (UFC2) with 20% filler, UFC4 with 60% filler, and EMC with 80% filler, demonstrated a 77% stress reduction compared to the baseline configuration.