计算机科学
现场可编程门阵列
数据流
吞吐量
延迟(音频)
设计流量
低延迟(资本市场)
计算机体系结构
计算机工程
嵌入式系统
计算机硬件
并行计算
无线
电信
计算机网络
作者
Felix Paul Jentzsch,Yaman Umuroglu,Alessandro Pappalardo,Michaela Blott,Marco Platzner
出处
期刊:IEEE Micro
[Institute of Electrical and Electronics Engineers]
日期:2022-11-01
卷期号:42 (6): 125-133
被引量:20
标识
DOI:10.1109/mm.2022.3202091
摘要
Deep neural networks (DNNs) are penetrating into a broad spectrum of applications and replacing manual algorithmic implementations, including the radio frequency communications domain with classical signal processing algorithms. However, the high throughput (gigasamples per second) and low latency requirements of this application domain pose a significant hurdle for adopting computationally demanding DNNs. In this article, we explore highly specialized DNN inference accelerator approaches on field-programmable gate arrays (FPGAs) for RadioML modulation classification. Using an automated end-to-end flow for the generation of the FPGA solution, we can easily explore a spectrum of solutions that optimize for different design targets, including accuracy, power efficiency, resources, throughput, and latency. By leveraging reduced precision arithmetic and customized streaming dataflow, we demonstrate a solution that meets the application requirements and outperforms alternative FPGA efforts by 3.5× in terms of throughput. Against modern embedded graphics processing units (GPUs), we measure $>\mathsf{10}\times$>10× higher throughput and $>\mathsf{100}\times$>100× lower latency under comparable accuracy and power envelopes.
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