Modeling of Enhancement-Mode GaN-GIT for High-Power and High-Temperature Application

This article presents an analytical model for enhancement-mode GaN devices for high-power application. The model is developed specifically for a GaN gate injection transistor (GIT) device in which a positive threshold voltage is achieved by inserting a p-type GaN layer underneath the gate electrode that is incorporated in the analytical model presented in this article. In addition, the operation of enhancement-mode GaN transistors for high-power application is significantly impacted by carrier spill-over at higher gate bias. Therefore, this model also includes the impact of carrier spill-over by considering parallel conduction in the barrier layer adjacent to the two-dimensional electron gas (2DEG) channel of the transistor and the degradation of mobility and charge density on device operation. In addition, due to high power dissipation and low thermal conductivity of GaN material, the device performance degrades at high temperature. In this article, high-temperature operation of the device is modeled by taking into account the temperature exponents of the device parameters that vary with temperature. At high current density, the device shows significant self-heating effect, which is also modeled using a similar approach. The overall model is compared with the experimentally measured data that shows an excellent match.