德拉姆
钥匙(锁)
节点(物理)
频道(广播)
计算机科学
非易失性存储器
随机存取存储器
光电子学
材料科学
计算机体系结构
嵌入式系统
纳米技术
计算机网络
工程类
计算机硬件
操作系统
结构工程
作者
Daewon Ha,Yunsung Lee,Seung‐Hwan Yoo,W. Lee,M. H. Cho,Kicheon Yoo,S. M. Lee,Seungwon Lee,Masayuki Terai,Taewoo Lee,J.H. Bae,Kyoung-Jun Moon,Chang Kyung Sung,M. Hong,D. G. Cho,Kyoobin Lee,Sang Wuk Park,K. Park,Bong Jin Kuh,Seok-Hun Hyun
标识
DOI:10.1109/imw59701.2024.10536968
摘要
In order to sustain DRAM scaling trajectory below 10nm node, it is indispensable to adopt innovative cell structures, advanced processes and novel materials such as IGZO. In this paper, we will discuss promising candidates for IGZO-based DRAM cell architecture including vertical channel transistor (VCT), vertically stacked cell array transistor (VS-CAT) and capacitor-less two transistors (2T0C), and recent advances in key technologies including IGZO deposition, gate stack engineering, contact resistance, and so on.
科研通智能强力驱动
Strongly Powered by AbleSci AI