JFET公司
材料科学
碳化硅
沟槽
短通道效应
制作
光电子学
MOSFET
平面的
功率MOSFET
基质(水族馆)
频道(广播)
工程物理
电气工程
晶体管
纳米技术
场效应晶体管
电压
工程类
计算机科学
复合材料
图层(电子)
病理
地质学
医学
海洋学
替代医学
计算机图形学(图像)
作者
Madankumar Sampath,Arash Salemi,Dallas Morisette,James A. Cooper
出处
期刊:Materials Science Forum
日期:2020-07-28
卷期号:1004: 751-757
被引量:7
标识
DOI:10.4028/www.scientific.net/msf.1004.751
摘要
Silicon Carbide (SiC) power MOSFETs have made great progress since the first commercial devices were introduced in 2011, but they are still far from theoretical limits of performance. Above ~1200 V the specific on-resistance is limited by the drift region, but below 1200 V the resistance is dominated by the channel and the substrate, with smaller contributions from the source and the JFET regions. Trench MOSFETs generally have smaller cell area than planar DMOSFETs and are inherently more scalable. In this paper, we describe a highly self-aligned fabrication process to realize deeply-scaled trench MOSFETs with a cell pitch of 0.5 μm per channel. Since the narrow gate trench is shaped like a letter “I”, we refer to these devices as “IMOSFETs.”
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