ASAP: An Efficient and Reliable Programming Algorithm for Multi-level RRAM Cell

For memory and in-memory computing applications, the multi-level cell (MLC) capability is one of the most favorable characteristics of resistive random-access memory (RRAM). However, achieving stable MLCs typically demands a time-consuming programming strategy. This paper presents a novel programming algorithm, Adaptive Step Adjustment Programming (ASAP), implemented on 1Mb RRAM chips fabricated using commercial 40nm CMOS technology. Our experimental results showcase a remarkable improvement in 16-level MLC programming efficiency (up to 10x). Furthermore, the MLC retention characteristics exhibit remarkable stability even after 10 ⁴ s thermal stress at 150°C.