微电子
焊接
材料科学
可靠性(半导体)
熔化温度
分层(地质)
电子包装
微观结构
硅
合金
复合材料
冶金
光电子学
功率(物理)
古生物学
物理
生物
构造学
量子力学
俯冲
作者
Vidya Jayaram,Omkar Gupte,Karan Bhangaonkar,Chandrasekharan Nair
出处
期刊:IEEE Transactions on Components, Packaging and Manufacturing Technology
[Institute of Electrical and Electronics Engineers]
日期:2023-04-01
卷期号:13 (4): 570-579
被引量:20
标识
DOI:10.1109/tcpmt.2023.3271269
摘要
The shift to lead-free solder alternatives led to the development of Sn–Ag–Cu (SAC) alloys as the most used solders due to their superior mechanical properties and reliability. However, their melting range (217 °C–222 °C) is much higher than that of lead (Pb)-based solders. With advances in microelectronics packaging at aggressive silicon nodes and complex heterogeneous architectures, the high melting temperatures of SAC-based solders significantly affect the package stress, leading to poor joint quality and early interlayer dielectric (ILD) delamination failures. Owing to this, lead-free low-temperature solders (LTSs) have gained momentum with focus on novel alloying compositions. Sn–Bi and In-based solders have emerged as the leading candidates for LTSs. This review article details the key requirements of LTS and evaluates the impact of alloy modifications to the microstructure, thermal/ mechanical properties, wettability, and reliability of Sn–Bi and In-based solder systems. This article also discusses the potential focus areas, especially hybrid LTS, as the bridge between SAC-based to full LTS joints.
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