A 1.8 V Low-Power Low-Noise High Tunable Gain TIA for CMOS Integrated Optoelectronic Biomedical Applications

跨阻放大器 CMOS芯片 光电二极管 电气工程 电子工程 放大器 可穿戴计算机 晶体管 带宽(计算) 噪音(视频) 计算机科学 电压 工程类 材料科学 光电子学 运算放大器 嵌入式系统 电信 图像(数学) 人工智能
作者
Guido Di Patrizio Stanchieri,Andrea De Marcellis,Graziano Battisti,Marco Faccio,E. Palange,Ülkühan Güler
出处
期刊:Electronics [Multidisciplinary Digital Publishing Institute]
卷期号:11 (8): 1271-1271 被引量:11
标识
DOI:10.3390/electronics11081271
摘要

This paper reports on a novel solution for a transimpedance amplifier (TIA) specifically designed as an analog conditioning circuit for low-voltage, low-power, wearable, portable and implantable optoelectronic integrated sensor systems in biomedical applications. The growing use of sensors in all fields of industry, biomedicine, agriculture, environment analysis, workplace security and safety, needs the development of small sensors with a reduced number of electronic components to be easily integrated in the standard CMOS technology. Especially in biomedicine applications, reduced size sensor systems with small power consumption are of paramount importance to make them non-invasive, comfortable tools for patients to be continuously monitored even with personalized therapeutics and/or that can find autonomous level of life using prosthetics. The proposed new TIA architecture has been designed at transistor level in TSMC 0.18 μm standard CMOS technology with the aim to operate with nanoampere input pulsed currents that can be generated, for example, by Si photodiodes in optical sensor systems. The designed solution operates at 1.8 V single supply voltage with a maximum power consumption of about 36.1 μW and provides a high variable gain up to about 124 dBΩ (with fine- and coarse-tuning capabilities) showing wide bandwidth up to about 1.15 MHz and low-noise characteristics with a minimum noise floor level down to about 0.39 pA/Hz. The overall circuit is described in detail, and its main characteristics and performances have been analyzed by performing accurate post-layout simulations.
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