Design of Time-Mode PI Controller for Switched-Capacitor DC/DC Converter Using Differential Evolution Algorithm—A Design Methodology

This work presents an automated design methodology for time-mode proportional and integral (PI) controllers aimed for an on-chip switched-capacitor (SC) dc/dc converter system. The basis of this design is the use of evolutionary optimization algorithms to find the near-optimal set of sizings for the time-mode PI controller. It is motivated due to the difficulty faced when tuning the controller parameters at a circuit level, which arise as a result of the presence of modeling inaccuracies and the small region for the linearized model where it is defined. Moreover, this design proposes the required modifications for the original design presented for the inductor-based dc/dc converter. These modifications are necessary to operate the SC dc/dc converter in slow switching limit (SSL). The addition of a pulse-width-modulated (PWM)-to-pulse frequency-modulated (PFM) conversion block is presented and elaborated in this article. The controller is codesigned using the differential evolution algorithm for the circuit level implementation to mitigate the issues prior mentioned. The optimized controller is then tested in a simulation environment using TSMC $0.18~\mu \text{m}$ technology. The results of the optimized controller were superior to those of a conventional controller. The optimized system achieved an overall efficiency of 79.1%.