与非门
可靠性(半导体)
阈值电压
闪光灯(摄影)
材料科学
计算机科学
电子工程
光电子学
电压
功率(物理)
电气工程
逻辑门
晶体管
工程类
物理
光学
量子力学
作者
Kousuke Miyaji,Ryoji Yajima,Teruyoshi Hatanaka,Minoru Takahashi,Shigeki Sakai,Ken Takeuchi
标识
DOI:10.1587/transele.e95.c.609
摘要
Initialize and weak-program erasing scheme is proposed to achieve high-performance and high-reliability Ferroelectric (Fe-) NAND flash solid-state drive (SSD). Bit-by-bit erase VTH control is achieved by the proposed erasing scheme and history effects in Fe-NAND is also suppressed. History effects change the future erase VTH shift characteristics by the past program voltage. The proposed erasing scheme decreases VTH shift variation due to history effects from ±40% to ±2% and the erase VTH distribution width is reduced from over 0.4V to 0.045V. As a result, the read and VPASS disturbance decrease by 42% and 37%, respectively. The proposed erasing scheme is immune to VTH variations and voltage stress. The proposed erasing scheme also suppresses the power and bandwidth degradation of SSD.
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