Record 7(N)+7(P) Multiple V T s Demonstration on GAA Si Nanosheet n/pFETs using WFM-Less Direct Interfacial La/Al-Dipole Technique

In this paper, for the first time, we have realized record 7(N)+7(P) multiple threshold voltages (Multi-VTs) on horizontal gate-all-around (GAA) Si nanosheet (SiNS) n/pFETs using work-function-metal-less (WFM-less) direct interfacial La/Al-dipole technique, regardless of the sheet-to-sheet spacing (Tsus) pinch-off in stacked channels. Owning to higher dipole intensity in ultra-thin high-k dielectric (HK) films obtained by ALD in-situ direct dual dielectric La-/Al-dipole (D4) control between adjacent NSs, both nFETs and pFETs have achieved 7 VTs (1 RVT, 3 HVT and 3 LVT) with good uniformity and discrimination even in WFM-less gate stack. The maximum VTtuning ranges reach 1105 mV/873 mV and the minimum discriminable ΔVTover 83mV/76mV for n/pFETs, respectively, exhibiting great multi-VTs application advantages for future high performance and low power GAA SiNS CMOS process.