材料科学
互连
晶片键合
三维集成电路
模具(集成电路)
集成电路封装
退火(玻璃)
光电子学
薄脆饼
焊接
倒装芯片
成套系统
集成电路
复合材料
球栅阵列
引线键合
电气工程
纳米技术
炸薯条
胶粘剂
计算机科学
工程类
计算机网络
图层(电子)
作者
Guilian Gao,Laura Mirkarimi,Thomas Workman,Gabe Guevara,Jeremy Theil,Cyprian Uzoh,G. G. Fountain,Bongsub Lee,P. Mrozek,Michael Huynh,Rajesh Katkar
标识
DOI:10.23919/iwlpc.2018.8573278
摘要
The Direct Bond Interconnect technology (DBI), commonly referred to as low temperature hybrid bonding, is an attractive bonding technology with the potential of much finer pitch and higher throughput than any solder based microbump bonding. Dielectric bonding takes place at ambient temperatures while the metal interconnection (usually Cu to Cu) forms at low annealing temperatures ranging from 150°C to 300°C. A 6μm pitch process is currently in high volume production for wafer-to-wafer (W2W) hybrid bonding. Die-to-wafer (D2W) and die-to-die (D2D) assembly has been in development at Xperi. The unique challenges include producing shallow, uniform and well controlled Cu recess on Cu bond pads of 5 um or greater, which is substantially larger than what is normally used in W2W bonding and particle minimization on die surface prior to bonding. Xperi-designed daisy chain dies and wafers consist of chains ranging from 2 to 31356 interconnects. Die size is 7.96 mm by 11.96 mm, which is similar to a typical high bandwidth memory (HBM) die. The bonding studies include 10μm and 15μm diameter bond pads on 40μm pitch and 5μm diameter bond pads on 10μm pitch. The die thickness is either 50 μm or 200 μm. In this paper, we present the latest development of our chemical mechanical polish (CMP) technology to produce uniform shallow Cu recess on 15um circular bond pads. The large pad size allows for a relaxed alignment accuracy requirement similar to manufacturing high throughput flip chip bonders available today. Additionally, high volume production ready process for bonding and D2W multi-layer stacking are explored as well as bonding yield and reliability improvement results.
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