High-resolution non-destructive three-dimensional imaging of integrated circuits

计量学 炸薯条 平面的 分辨率(逻辑) 计算机科学 电子线路 材料科学 摄影术 纳米技术 光电子学 光学 集成电路 物理 衍射 电气工程 人工智能 工程类 计算机图形学(图像) 电信
作者
Mirko Holler,Manuel Guizar‐Sicairos,Esther H. R. Tsai,R. Dinapoli,E. Müller,Oliver Bunk,Jörg Raabe,G. Aeppli
出处
期刊:Nature [Nature Portfolio]
卷期号:543 (7645): 402-406 被引量:450
标识
DOI:10.1038/nature21698
摘要

A recently developed computational imaging technique, X-ray ptychographic tomography, is used to study integrated circuits, and a 3D image of a processor chip with a resolution of 14.6 nm is obtained. As computer chips have become increasingly crammed with nanometre-scale devices and circuitry, new microscopy techniques that can resolve the smallest features are required to enable chip design and inspection. X-ray imaging is uniquely suited for non-destructive, high-resolution imaging and Mirko Holler et al. make use of a recently developed computational imaging technique, X-ray ptychography, to generate high-resolution three-dimensional images of integrated circuits. They test X-ray ptychography on a circuit with known features, and then apply it to an Intel processor chip manufactured in the 22-nanometre technology, obtaining detailed three-dimensional maps of the devices with a resolution down to 14.6 nanometres. This technique could be used to assist quality control during chip production. Modern nanoelectronics1,2 has advanced to a point at which it is impossible to image entire devices and their interconnections non-destructively because of their small feature sizes and the complex three-dimensional structures resulting from their integration on a chip. This metrology gap implies a lack of direct feedback between design and manufacturing processes, and hampers quality control during production, shipment and use. Here we demonstrate that X-ray ptychography3,4—a high-resolution coherent diffractive imaging technique—can create three-dimensional images of integrated circuits of known and unknown designs with a lateral resolution in all directions down to 14.6 nanometres. We obtained detailed device geometries and corresponding elemental maps, and show how the devices are integrated with each other to form the chip. Our experiments represent a major advance in chip inspection and reverse engineering over the traditional destructive electron microscopy and ion milling techniques5,6,7. Foreseeable developments in X-ray sources8, optics9 and detectors10, as well as adoption of an instrument geometry11 optimized for planar rather than cylindrical samples, could lead to a thousand-fold increase in efficiency, with concomitant reductions in scan times and voxel sizes.
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