Analysis and Optimization of High-Frequency Switching Oscillation Conducted CM Current Considering Parasitic Parameters Based on a Half-Bridge Power Module

SiC mosfet s with antiparallel SiC schottky barrier diodes (SBDs) without reverse recovery can significantly reduce turn- on switching loss. However, this will exacerbate the oscillation during the switching process, making the electromagnetic interference problem more serious. This article analyzes the influence of the power module parasitic parameters on the propagation path and proposes the optimization principle for the first time. First, the high-frequency switching oscillation noise source (HO-S) and the propagation path considering power module parasitic parameters based on a double-pulse test circuit are analyzed. Second, a high-frequency switching oscillation conduction common-mode (HO-CM) current mathematical model is established during the switching oscillation process to clarify the relationship among noise source, propagation path, and HO-CM current. Then, in order to reduce HO-CM current, the optimization principle of HO-CM current excited by HO-S is proposed. The HO-CM current can be canceled by optimizing the power module layout or Busbar parasitic inductance. Finally, the effect of power module parasitic parameters on HO-CM current is verified, and the HO-CM currents of power modules with different packaging layouts are compared. This method can reduce the HO-CM current spectrum of the critical conduction mode or discontinuous conduction mode buck converter by more than 10 dB. The analysis of the effect of power module parasitic parameters on HO-CM current can guide power module layout design or power module selection based on different working conditions of half-bridge converters.