Model of the Weak Reset Process in HfOx Resistive Memory for Deep Learning Frameworks

MNIST数据库 电阻随机存取存储器 重置(财务) 计算机科学 深度学习 任务(项目管理) 过程(计算) 内存处理 人工智能 人工神经网络 电子工程 机器学习 计算机工程 电气工程 工程类 电压 操作系统 情报检索 经济 Web搜索查询 金融经济学 搜索引擎 按示例查询 系统工程
作者
Atreya Majumdar,M. Bocquet,Tifenn Hirtzlin,Axel Laborieux,Jacques‐Olivier Klein,E. Nowak,Elisa Vianello,Jean‐Michel Portal,Damien Querlioz
出处
期刊:IEEE Transactions on Electron Devices [Institute of Electrical and Electronics Engineers]
卷期号:68 (10): 4925-4932 被引量:5
标识
DOI:10.1109/ted.2021.3108479
摘要

The implementation of current deep learning training algorithms is power-hungry, owing to data transfer between memory and logic units. Oxide-based RRAMs are outstanding candidates to implement in-memory computing, which is less power-intensive. Their weak RESET regime, is particularly attractive for learning, as it allows tuning the resistance of the devices with remarkable endurance. However, the resistive change behavior in this regime suffers many fluctuations and is particularly challenging to model, especially in a way compatible with tools used for simulating deep learning. In this work, we present a model of the weak RESET process in hafnium oxide RRAM and integrate this model within the PyTorch deep learning framework. Validated on experiments on a hybrid CMOS/RRAM technology, our model reproduces both the noisy progressive behavior and the device-to-device (D2D) variability. We use this tool to train Binarized Neural Networks for the MNIST handwritten digit recognition task and the CIFAR-10 object classification task. We simulate our model with and without various aspects of device imperfections to understand their impact on the training process and identify that the D2D variability is the most detrimental aspect. The framework can be used in the same manner for other types of memories to identify the device imperfections that cause the most degradation, which can, in turn, be used to optimize the devices to reduce the impact of these imperfections.
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