Recent progress on multiple-patterning process

The optical projection technique with evolution of Exposure wave length (λ) and Numerical Aperture (NA) has been historically driven Photolithographic scaling. Although the delay of EUV tool for HVM has been concerned, scaling is going on steadily after limitation of 193nm-immersion technique. Double patterning process has been firstly adopted in 30nm node device of memory device, and evolved step by step from SADP, SAQP to SAOP [1][2][3]. Self-Aligned Multiple-Patterning (SAMP) with 193-immersion is getting most promising technology for further downwards scaling at the present. For the extension of 193-immersion, many solutions in mask and illumination area were suggested, and these are represented by SMO (Source and Mask Optimization) and linked to “Computational lithography”. Furthermore, the change of device layout design to 1D (Single directional) layout [4] is the solution to mitigate several process issues, which are represented by process variability, pattern fidelity and Edge placement error (EPE). This paper presents the results of observing pattern fidelity in the multiple patterning process from many aspects and the results of testing a technique for high-accuracy management of pattern fidelity in 1D layout.