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Design and Simulation of Deep Trench Capacitor on High-Performance Silicon Interposer

中间层 沟槽 电容器 材料科学 去耦电容器 电子工程 通过硅通孔 计算机科学 电气工程 光电子学 工程类 蚀刻(微加工) 电压 纳米技术 图层(电子)
作者
Changming Song,Qian Wang,Kai Zheng,Yikang Zhou,Jian Cai
标识
DOI:10.1109/icept56209.2022.9873472
摘要

The arrival of the post-Moore era has become a consensus, and heterogeneous integration technology has become an important technical route for the development of integrated circuits. Heterogeneous integration usually uses a substrate (in many cases, it’s a silicon interposer) to realize the power supply and interconnection between components. As demands for performance and interconnect density continue to increase, decoupling capacitors must be used on interposers to tackle growing EMI issues. Silicon capacitor technology, especially deep trench capacitor (DTC) technology, is well suited for silicon interposer based integration due to advantages of small profile and CMOS process compatibility, etc. However, existing DTC devices still cannot meet the needs of high-performance and high-frequency applications, and there is still a lot of space for improvement in terms of increasing capacitance density and reducing ESR and ESL.In this paper, several DTC technologies are compared, and on the basis of comparative analysis, some effective optimization ideas are summarized. Under the same process conditions, the shape design of the capacitor device can significantly affect the device performance. Therefore, based on the densest-packing principle, a novel deep trench capacitor device with hexagonal design is proposed. Furthermore, a quantitative index to estimate capacitance density of DTC devices with different shape design is set up for design.Finally, the width of trenches is 1μm, and the depth is 15μm. The material of the electrode layer and the dielectric layer is titanium nitride (TiN) and hafnium oxide (HfO2), respectively. The simulation results show that the novel design achieves a capacitance density of up to 1200nF/mm 2 . Under the specific simulation condition, where the equivalent capacitance is around 5nF, ESL is reduced to 5.76pH@10GHz, and ESR is 1.01 ohm. It is worth mentioning that the impedance of the device itself remains stable at about 1 ohm in a fairly wide frequency band from 100MHz to 10GHz. Scaling and applying more advanced manufacturing processes can lead to higher capacitance density and better electrical performance.
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