Precise and scalable analogue matrix equation solving using resistive random-access memory chips

Precision has long been the central bottleneck of analogue computing. Bit-slicing or analogue compensation can be used to perform matrix–vector multiplication with precision, but solving matrix equations using such techniques is challenging. Here we describe a precise and scalable analogue matrix inversion solver. Our approach uses an iterative algorithm that combines analogue low-precision matrix inversion and analogue high-precision matrix–vector multiplication operations. Both operations are implemented using 3-bit resistive random-access memory chips that are fabricated in a foundry. By combining these with a block matrix algorithm, inversion problems involving 16 × 16 real-valued matrices are experimentally solved with 24-bit fixed-point precision (comparable to 32-bit floating point; FP32). Applied to signal detection in massive multi-input and multi-output systems, our approach achieves performance comparable to FP32 digital processors in just three iterations. Benchmarking shows that our analogue computing approach could offer a 1,000 times higher throughput and 100 times better energy efficiency than state-of-the-art digital processors for the same precision. An analogue matrix solver that combines low-precision matrix inversion and high-precision matrix–vector multiplication can be used to solve inversion problems involving 16 × 16 real-valued matrices with precision comparable to 32-bit floating point.