Improvement of crystallinity for poly-Si thin film by negative substrate bias at low temperature

Polycrystalline silicon (p-Si) thin films are fabricated by plasma enhanced chemical vapor deposition (PECVD) at low substrate temperature (180 °C) with high-hydrogen dilution. Negative DC substrate bias is applied during the deposition process for improving the crystallinity of thin films. It is found that there is a phase transition from nanocrystalline phase to polycrystalline phase at negative bias = 50 V, as identified by scanning electron microscopy (SEM). The optimized p-Si thin film with large grains (~ 480 nm) are obtained at negative bias = 100 V. The deconvoluted Raman spectra reveal that the p-Si thin film is a mixture including amorphous silicon (a-Si), nanocrystalline silicon (nc-Si) and p-Si, and the crystalline volume fraction gradually increases with the substrate negative bias in the range of 0–100 V. The impacts of negative bias on the optical and electrical properties of p-Si thin films have been investigated. The growth mechanism of the p-Si grains has been discussed in detail. A grain-merging model is proposed for explaining the effect of negative bias on the formation of large p-Si grains at low temperature.