放大器
邻道
电容器
电气工程
CMOS芯片
电阻抗
电子工程
拓扑(电路)
材料科学
计算机科学
工程类
电压
作者
Bong-Jun Yang,Huizhen Jenny Qian,Xun Luo
出处
期刊:IEEE Journal of Solid-state Circuits
[Institute of Electrical and Electronics Engineers]
日期:2021-12-01
卷期号:56 (12): 3715-3727
被引量:10
标识
DOI:10.1109/jssc.2021.3113511
摘要
This article presents a quadrature switched/floated capacitor power amplifier (SFCPA) with deep back-off efficiency enhancement. The SFCPA is introduced to decrease the dynamic power consumption at power back-off (PBO), which could improve the system efficiency (SE). The reconfigurable self-coupling canceling transformer (RSCCT) with enhanced tuning range of turn ratio is used to achieve impedance boosting for further improved efficiency at deep PBO. Based on the proposed SFCPA, a watt-level quadrature digital power amplifier (DPA) with IQ cell sharing, hybrid Doherty, and impedance boosting is proposed for deep PBO efficiency enhancement. Implemented in 40-nm CMOS, the proposed DPA with 1.2-/2.4-V supply achieves 30.3-dBm saturated output power ( $P_{\mathrm{ out}}$ ) with 36.6%/32.9%/29.1%/23.7%/18.6%/13.2% SE for 0-/3-/6-/9-/12-/15-dB PBOs at 2.4 GHz. For 60-MHz 256-QAM modulation signal, it delivers 23.32-dBm average output power ( $P_{\mathrm{ avg}}$ ) with an error vector magnitude (EVM) of −31.9 dB and an average drain efficiency (DE) of 30.7%. For 40-MHz 1024-QAM signal, it shows 20.44-dBm $P_{\mathrm{ avg}}$ with an EVM of −35.9 dB and an average DE of 22.6%.
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