NLSTT-MRAM: Robust spin transfer torque MRAM using non-local spin injection for write

In this work we propose a magnetic random access memory (MRAM) bit-cell design based on non-local spin transfer torque (NLSTT). In the proposed bit-cell, the data is written into the free layer of a magnetic tunnel junction (MTJ) using spin diffusion current (non-local spin injection), without injecting charge current into the tunneling oxide. Thus, the reliability issues, related to dielectric breakdown due to high tunneling current density (for high switching speed) are significantly mitigated. Separation of read and write current paths in the bit-cell helps in optimizing read and write separately. Hence, higher MgO thickness can be used for higher cell TMR and higher read disturb margin. Higher MTJ resistance resulting from thicker MgO also lets us use voltage mode sensing, that achieves higher speed for read operation. In the proposed bit-cell, we employ two supplementary spin injectors with tilted axis anisotropy, in order to compensate for the comparatively lower efficiency for non-local spin injection. Analysis of the proposed NLSTT-MRAM bit-cell is done using a physics based simulation framework, benchmarked with experimental data for lateral spin valve (LSV). Apart from high reliability, the proposed bit-cell achieves 110% higher tunnel magneto resistance (TMR) and 4X higher read margin for I ns switching speed as compared to standard I-transistor-I MTJ (1-T I-R) STT -MRAM of similar area.