放大器
邻道
波峰系数
宽带
多尔蒂放大器
电气工程
计算机科学
电子工程
泄漏(经济)
功率(物理)
工程类
带宽(计算)
电信
射频功率放大器
CMOS芯片
物理
宏观经济学
经济
量子力学
作者
Xuan Anh Nghiem,Junqing Guan,Renato Negra
标识
DOI:10.1109/mwsym.2014.6848476
摘要
This paper presents the design and implementation of a broadband 3-way sequential-based Doherty power amplifier (DPA). This design approach can also be extended for a broadband N-way DPA architecture. A 12 - 23.5 W 3-way DPA has been designed, implemented and characterised to verify the proposed technique. The measured drain efficiency of 55 - 69 % over 500 MHz at 12 - 14 dB output power backoff (OBO) and 60 - 75 % over 600 MHz at saturation is achieved. Single-tone measurement at 2.1 GHz exhibits a drain efficiency of 63 %, 62.5 % and 75 % at 13.6 dB, 6 dB and 0 dB OBO, respectively. Also at this frequency, linearised measurement with a 10 MHz-LTE signal having a crest factor of 8.2 dB shows an average drain efficiency of 59 % and adjacent channel leakage ratio (ACLR) better than -45.5/ - 45.7 dBc at an average output power of 34.5 dBm. To the best knowledge of the authors, this is the first broadband 3-way sequential Doherty power amplifier with such high performance reported so far.
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