Multiple System and Heterogeneous Integration with TSV-Interposers

As mentioned in Chaps. 1 and 2 and Lau in IEEE Trans CPMT 12:1271–1281 (2022), there are at least three different multiple systemMultiple system and heterogeneous integration packaging, as shown in Fig. 3.1, namely, (1) multiple system and heterogeneous integration with thin-film layerThin-film layers directly on top of a build-up package substrate (2.1D IC integration), Fig. 3.1a, (2) multiple system and heterogeneous integration with TSVThrough-silicon via (TSV)-less interposerTSV-less interposer (2.3D IC integration)2.3D IC integration, Fig. 3.1b, and (3) multiple system and heterogeneous integration with TSV interposers (2.5D and 3D IC integration3D IC integration), Fig. 3.1c.