Exploration of vertical scaling limit in carbon nanotube transistors

Top-gated carbon nanotube field-effect transistors (CNT FETs) were fabricated by using ultra-thin (4.5 nm or thinner) atomic-layer-deposition grown HfO2 as gate insulator, and shown to exhibit high gate efficiency, i.e., all examined (totally 76) devices present very low room temperature subthreshold swing with an averaged value of 64 mV/Dec, without observable carrier mobility degradation. The gate leakage of the CNT FET under fixed gate voltage is dependent not only on the thickness of HfO2 insulator, but also on the diameter of the CNT. The vertical scaling limit of CNT FETs is determined by gate leakage standard in ultra large scale integrated circuits. HfO2 film with effective oxide thickness of 1.2 nm can provide both excellent gate electrostatic controllability and small gate leakage for sub-5 nm FETs based on CNT with small diameter.