光电子学
可靠性(半导体)
材料科学
极化(电化学)
宽禁带半导体
氮化镓
计算机科学
物理
纳米技术
功率(物理)
量子力学
物理化学
化学
图层(电子)
作者
Bhawani Shankar,Ankit Soni,Sayak Dutta Gupta,Mayank Shrivastava
标识
DOI:10.1109/irps.2018.8353595
摘要
For the first time, this work reports Safe Operating Area (SOA) assessment and degradation physics in Polarization Super Junction (PSJ) based GaN FETs made on Silicon and sapphire substrates under high voltage and high current injection conditions. Impact of device design parameters on SOA, associated trap assisted device degradation, and thermal failure are studied. Correlation between polarization super junction length and failure threshold is discovered, beside power and field dependence of SOA boundary.
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