C33 Improvement of global flatness and site flatness near wafer edge in polishing of silicon wafer

For increasing the integration density of semiconductor devices, there is growing demand for achieving high global flatness and site flatness especially near the wafer edge in polishing of silicon wafers. In this study, polishing conditions in double-sided polishing process were optimized to uniform material removal distribution on wafer and polishing pad properties for decreasing edge roll off were investigated.