阈下传导
带隙基准
材料科学
CMOS芯片
电气工程
电压
过驱动电压
电压基准
晶体管
灵敏度(控制系统)
PMOS逻辑
MOSFET
阈值电压
开关电容器
光电子学
电容器
跌落电压
电子工程
工程类
作者
Hao Zhang,Meng-Shu Huang,Yi-Meng Zhang,Tsutomu Yoshihara
标识
DOI:10.5573/jsts.2014.14.1.070
摘要
A nano-power CMOS voltage reference is proposed in this paper. Through a combination of switched-capacitor technology with the body effect in MOSFETs, the output voltage is defined as the difference between two gate-source voltages using only a single PMOS transistor operated in the subthreshold region, which has low sensitivity to the temperature and supply voltage. A low output, which breaks the threshold restriction, is produced without any subdivision of the components, and flexible trimming capability can be achieved with a composite transistor, such that the chip area is saved. The chip is implemented in 0.18 ?m standard CMOS technology. Measurements show that the output voltage is approximately 123.3 mV, the temperature coefficient is 17.6 ppm/oC, and the line sensitivity is 0.15 %/V. When the supply voltage is 1 V, the supply current is less than 90 nA at room temperature. The area occupation is approximately 0.03 mm2.
科研通智能强力驱动
Strongly Powered by AbleSci AI