电容器
校准
直方图
计算机科学
逐次逼近ADC
计算
炸薯条
简单(哲学)
电子工程
人工智能
算法
电压
工程类
数学
电气工程
电信
图像(数学)
统计
认识论
哲学
作者
Xiao Wang,Fule Li,Zhihua Wang
出处
期刊:IEEE Transactions on Circuits and Systems Ii-express Briefs
[Institute of Electrical and Electronics Engineers]
日期:2020-04-21
卷期号:67 (12): 2838-2842
被引量:13
标识
DOI:10.1109/tcsii.2020.2988646
摘要
This brief presents a simple capacitor mismatch calibration in SAR ADCs, which is in foreground and on chip. Capacitor errors are extracted based on output histogram under a triangular input signal generated on chip and compensated by tuning capacitors with a calibration DAC. A novel one-by-one strategy can simplify the extraction by isolating the individual contribution of each capacitor error. The proposed calibration needs no computation and is validated with a 10-bit 100MS/s SAR ADC. Size of the ADC core including calibration system is only 90μm×97μm. Measurement results show effectiveness of the proposed calibration.
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