Corrigendum: Investigating GaN/SiC Hybrid Field-Effect Transistor Designs for Simplified Fabrication Process and Improved Performance [ECS J. Solid State Sci. Technol., 14, 111002 (2025)]

Abstract This work investigates two simplified GaN/SiC hybrid field-effect transistor (HyFET) designs that eliminate the need for complex SiC regrowth. In the first design (HyFET-1), the GaN/SiC interconnection is placed on the SiC drift layer and shielded by nearby p-wells. While the first design (HyFET-1) requires deep p-wells, the optimized design (HyFET-2) incorporates an additional p-well beneath the interconnection. This enables effective shielding with shallow (~1 µm) p-wells, reduces JFET resistance, and improves the Ron-BV performance, offering a practical path to high-performance HyFETs using established fabrication processes.