移相模块
振幅
拓扑(电路)
CMOS芯片
4位
相(物质)
物理
插入损耗
电子工程
电气工程
光电子学
光学
工程类
量子力学
作者
Hongyun Zhang,Jiang Luo,Pengwei Chen,Wenzhu Zhang,Wenjun Li,Jun Liu
标识
DOI:10.1109/icmmt58241.2023.10277332
摘要
In this paper, a Ka-band switched-type 6-bit phase shifter is designed in 55-nm CMOS process. The bridged T-type topology is utilized for phase-shift bits of 5.625°, 11.25°, 22.5°, and 45°, while the high-low pass type topology is employed for phase-shift bits of 90° and 180°. Capacitive compensation technique is used for the 45° unit to minimize amplitude errors. Based on the simulation results, the designed 6-bit phase shifter has a root mean square (RMS) phase error of less than 5.2° at the operating frequencies from 36.5 GHz to 40 GHz, while the RMS amplitude error is better than 0.62 dB. The simulated insertion loss is 13 ± 2 dB over all 64 states.
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