Engineered common environmental effects on multitransistor systems

In this paper, we analyze the impact of physically large baths used in terminals of thermal multitransistor systems formed using two-level systems (TLSs). In particular, we simulate the effects of a two-transistor system introduced as a thermal Darlington pair (DP). The size and proximity of the baths can cause multiple interactions with the transistor terminals represented by the TLS, not just the TLS directly connected to them. Such interactions can ultimately suppress the heat flows or impair the transistor action. However, we demonstrate that the DP model can achieve more than a $50%$ increase in heat flows. Using the engineered interactions leading to the correlated TLS-thermal bath interactions, we establish an incoherent (no quantum coherence in the density matrix at the steady state) yet correlated (joint excitation of two TLSs due to bath interaction) heat transfer model to a two-transistor arrangement in a substrate. This model helps us to interpret the environmental effects on the device by treating the common environment as separate thermal baths and all the transitions in the system as independent. We also show that this model can be mapped to contain dark-states. These dark-states can provide an external channel for transistor switching. We use this knowledge to design thermal counterparts of electronic AND and OR gates, and to study their switching time and operation, paving the way to realizing thermal logic gates.