RFIC公司
材料科学
光电子学
电介质
电气工程
工程物理
纳米技术
工程类
CMOS芯片
作者
Kaushal Kumar,Ajay Kumar,Vinay Kumar,Aditya Jain,S. C. Sharma
标识
DOI:10.1088/2631-8695/ad6bea
摘要
Abstract In this study, we present a dual dielectric material gated novel Si 0.9 Ge 0.1 /InAs hetero-structure Junctionless TFET (DMG-HJLTFET), in which first time, a novel amalgamation of Si 0.9 Ge 0.1 /InAs along with HfO 2 and SiO 2 is used on the basis of band gap and gate dielectric engineering respectively. Our main goal is to examine the performance of the reported device in terms of radio frequency (RF), linearity, and intermodulation distortion parameters. The reported device’s (DMG-HJLTFET) result is compared with latest published articles and conventional Si-JLTFET to show the improvement. Our simulation results reveal that DMG-HJLTFET outperforms Si-JLTFET in several key metrics, such as parasitic capacitance (C gg , 49% ↓), maximum oscillation frequency (f max , 589 times ↑), gain bandwidth product (GBP, 238.5 times ↑), intrinsic gain (A v , 2.24 × 10 2 times ↑), peak transconductance (g m , 110 times ↑), and second-order voltage intercept point (VIP2, 330.2% ↑). Our findings lead us to the conclusion that DMG-HJLTFET might be a promising substitute for low-power and high-frequency applications.
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