Subthermionic field-effect transistors with sub-5 nm gate lengths based on van der Waals ferroelectric heterostructures

Overcoming the sub-5 nm gate length limit and decreasing the power dissipation are two main objects in the electronics research field. Besides advanced engineering techniques, considering new material systems may be helpful. Here, we demonstrate two-dimensional (2D) subthermionic field-effect transistors (FETs) with sub-5 nm gate lengths based on ferroelectric (FE) van der Waals heterostructures (vdWHs). The FE vdWHs are composed of graphene, MoS2, and CuInP2S6 acting as 2D contacts, channels, and ferroelectric dielectric layers, respectively. We first show that the as-fabricated long-channel device exhibits nearly hysteresis-free subthermionic switching over three orders of magnitude of drain current at room temperature. Further, we fabricate short-channel subthermionic FETs using metallic carbon nanotubes as effective gate terminals. A typical device shows subthermionic switching over five-to-six orders of magnitude of drain current with a minimum subthreshold swing of 6.1 mV/dec at room temperature. Our results indicate that 2D materials system is promising for advanced highly-integrated energy-efficient electronic devices.