Alignment tolerant, low voltage, 023 Vcm, push-pull silicon photonic switches based on a vertical pn junction

In this paper, we present the design, fabrication and characterization of a carrier depletion silicon-photonic switch based on a highly doped vertical pn junction. The vertical nature of the pn junction enables the device to exhibit a modulation efficiency as high as 0.23 V.cm. Fast switching times of 60ps are achieved in a lumped configuration. Moreover, the process flow is highly tolerant to fabrication deviations allowing a seamless transfer to the 350 nm process node of a commercial complementary-metal-oxide semiconductor (CMOS) foundry. Overall, this work showcases the possibility of fabricating highly efficient carrier depletion-based silicon photonic switches using medium resolution lithography.