材料科学
电感
平面的
寄生元件
光电子学
MOSFET
功率MOSFET
电气工程
寄生提取
功率(物理)
逻辑门
快速切换
电子工程
计算机科学
电压
工程类
物理
晶体管
计算机图形学(图像)
量子力学
作者
Arash Edvin Risseh,Hans‐Peter Nee,Konstantin Kostov
出处
期刊:2018 International Power Electronics Conference (IPEC-Niigata 2018 -ECCE Asia)
日期:2018-05-01
被引量:13
标识
DOI:10.23919/ipec.2018.8507509
摘要
Parasitic inductances caused by the package of semiconductor devices in power converters, are limiting the switching speed and giving rise to higher switching losses than necessary. In this study a half-bridge planar power module with Silicon Carbide (SiC) MOSFET bare dies was designed and manufactured for ultra-low parasitic inductance. The circuit structure was simulated and the parasitic inductances were extracted from ANSYS-Q3D. The values were then fed into LT-Spice to simulate the electrical behavior of the half-bridge. The experimental and simulation results were compared to each other and were used to adjust and easily extend the simulation model with additional MOSFETs for higher current capability. It was shown that the proposed planar module, with four parallel SiC MOSFETs at each position, is able to switch 600V and 400A during 40 and 17ns with EON and EOFF equal to 3.1 and 1.3mJ, respectively. Moreover, unlike the commercial modules, this design allows double-sided cooling to extract the generated heat from the device, resulting in lower operating temperature.
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