Power Layout Design of a GaN HEMTs-Based High Power High-Efficiency Three Level ANPC Inverter for 800 V DC Bus System

Multiple commutation paths exist for switching devices in a three-level active neutral point clamped (3L-ANPC) inverter operation based on the selected switching state and current direction. Additionally, the capacitive coupling path of the non-switching device is a key design aspect for enabling high voltage and high current operation of GaN switches in 3L-ANPC topology. A comprehensive study of the switching transient events of inner, outer and clamping devices of 3L-ANPC is presented in this paper. The commutation mechanisms for worst-case transient voltage overshoots (TOVs) are identified. A simplified equivalent circuit model is presented to determine the design criteria for the power layout structure's parasitic inductances. A power layout strategy satisfying the design criteria is then proposed using an insulated metal substrate (IMS) power PCB to enable efficient high-power operation. The proposed design minimizes the commutation and capacitive coupling path inductances to 6nH and 11.5nH, respectively. This enables the fast switching operation of GaN HEMTs at 800 V DC, 36 A with a low TOV of 31% verified through experimental three-level double pulse test results. Experimental evaluation of a three-phase 3L-ANPC hardware prototype based on the proposed power layout shows 99% efficiency at 800 V, 9.5 kVA and 50 kHz switching frequency. The proposed design achieves a low case-to-ambient thermal resistance of 2.3 $\mathbf {^{\circ }C/W}$ .