5.1 A 5-to-16GHz Reconfigurable Quadrature Receiver with 50% Duty-Cycle LO and IQ-Leakage Suppression

Agile multi-functional RF systems supporting multiple communication and radar protocols are of greater demand in modern wireless applications. The core of these systems is the transceiver IC that covers an ultra-wide frequency range from sub-GHz to >20GHz, provides highly flexible signal bandwidths, and adjusts its power consumption accordingly in different use cases. This imposes several design challenges. Firstly, the RF front-end must process the incoming signal over a wide frequency range (f RF ) without contributing excessive noise and distortions [1, 2]. Secondly, the difficulty of generating multi-phase clocks with low phase mismatches and low jitter that are essential for mixing grows significantly at higher carrier (f LO ) frequencies [2]. Thirdly, whereas the power consumption of the front-end remains independent of the baseband signal bandwidth (f BB ) on the first order, the analog baseband intensively using amplifiers sees dramatic power overhead with increasingly higher f BB [3]. Lastly, the desired high reconfigurability including gain, bandwidth and power consumption inevitably complicates circuit design [4]. To address these challenges, this work describes a 5-to-16GHz, 32-to-72dB gain and 2.2-to-5.7dB noise figure (NF) quadrature RF receiver with on-chip multi-phase clock generation and enhanced I-Q isolation.