Higher NMOS Single Event Transient Susceptibility Compared to PMOS in Sub-20nm Bulk FinFET

The single event transient (SET) susceptibility in the sub-20nm bulk FinFET process is studied in this letter. It is firstly found that NMOS is more sensitive to SET compared with PMOS, which is opposite to the planar CMOS process. A FinFET Technology Computer-Aid Design (TCAD) model is established to research the underlying physical mechanisms. Results show that two factors lead to the difference in SET susceptibility between NMOS and PMOS. First, the drift & diffusion (DD) plays more role than bipolar amplification (BA) in FinFET-PMOS, causing lower SET sensitivity than planar-PMOS. Second, source and drain (S/D) collect more charge in NMOS, causing more sensitivity of SET compared to PMOS.