发射机
物理
伪随机二进制序列
多路复用器
放大器
电气工程
电子工程
锁相环
宽带
倍频器
正交调幅
工程类
误码率
光电子学
二进制数
CMOS芯片
多路复用
相位噪声
数学
频道(广播)
算术
作者
Steven Callender,Abhishek Agrawal,Amy Whitcombe,Ritesh Bhat,Md. Shafiqur Rahman,Chun C. Lee,Peter Sagazio,Georgios C. Dogiamis,Brent Carlton,Christopher Hull,Stefano Pellerano
出处
期刊:IEEE Journal of Solid-state Circuits
[Institute of Electrical and Electronics Engineers]
日期:2022-12-01
卷期号:57 (12): 3582-3598
被引量:5
标识
DOI:10.1109/jssc.2022.3208510
摘要
This work presents a fully integrated 140-GHz transmitter (TX) achieving a data rate of 160 Gb/s with ~1-pJ/b efficiency in the 22-nm Intel FinFET technology. The TX leverages a wideband radio frequency digital to analog converter (RF-DAC) architecture with embedded 4:1 multiplexer, and it is integrated with a sub-sampling quadrature phase-locked loop (PLL), frequency tripler, local oscillator (LO) buffers, wideband two-stage power amplifier (PA), and on-chip SRAM/pseudorandom binary sequence (PRBS) for high-speed data generation. The TX achieves 120/160-Gb/s 16 quadratic-amplitude modulation (QAM) with −19/−17-dB error vector magnitude (EVM) at an output power of +1.5/+0.8 dBm.
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