In this article, a physically based grain boundary (GB) barrier height ( $\psi_{\textit{B}}$ ) model with temperature ( T ) dependence is developed for poly-Si channel macaroni MOSFETs. Experimental data of 3-D NAND flash string current are employed to calibrate a computer aided design (TCAD) simulation tool. $\psi_{\textit{B}}$ is then extracted from the macaroni MOSFETs with a single GB located at the center of the channel as a simulation structure, which is used to verify the $\psi_{\textit{B}}$ model. In order to model the temperature dependence, $\psi_{\textit{B}}$ is derived without approximation of Fermi-Dirac distribution function. The $\psi_{\textit{B}}$ model is compared with simulated $\psi_{\textit{B}}$ to validate the model over a wide temperature range as well as a gate bias ( $\textit{V}_{\text{GS}}$ ), and a good agreement between them is achieved. In addition, we investigate the contributions of the surface potential inside grain, $\psi_\textit{S}$ , and the surface potential at GB, $\psi_{\text{GB}} $ , to the reduction of $\psi_{\textit{B}}$ with increasing temperature.