A unified approach for the analysis of single-phase Power Factor Correction converters

Power Factor Correction (PFC) circuits are widely used in single-phase rectifiers in order to emulate a linear resistive behavior. Several PFC topologies were introduced in the last thirty years, depending on the required source-load characteristics and system performance. The Boost PFC is still the most popular configuration due to its simplicity, but it suffers from high voltage stresses across the power electronic devices. To overcome this drawback, Buck-Boost structures such as the Cuk, SEPIC and Sheppard-Taylor topologies were designed and found quickly great interest among power electronics researchers. The complete analysis of these converters along with the Boost PFC was traditionally elaborated independently, each study being only valid to a specific topology. In this paper, a unified approach allowing the design and analysis of any PFC converter in a common framework is proposed. The mathematical developments concern a general-case topology that could represent any of the above mentioned converters. The obtained theoretical results are then verified through comparison with the already known equations specified for each topology.