Design and simulation of a differential capacitive MEMS sensor with CMOS readout circuit

This paper presents the design and simulation of a highly sensitive differential capacitive MEMS sensor using COMSOL software. Additionally, a novel switched-capacitor-based capacitance-to-digital converter (CDC) is simulated and optimised in a 65 nm CMOS technology as a readout circuit. Reducing the stiffness can improve the microelectrical parameters of the sensor, but it comes at the cost of reduced bandwidth. The sensor design is optimised for a bandwidth of 1 kHz, and it has a nominal capacitance of 0.68 pF, a capacitive sensitivity of 17.5 fF/g, a voltage sensitivity of 60 mV/g within an input range of 5 g, and a sensing area of 0.1 mm2. The proposed CDC achieves low power consumption, high reliability, and a simpler design through direct conversion. Furthermore, the ratiometric measurement is used to reduce the effect of parasitic capacitances. The power consumption of the readout circuit for a 1.2 V supply is 265 μW. Also, the maximum values of DNL and INL are 0.14 LSB and −0.5 LSB, respectively.