Effects of ion implantation process on defect distribution in SiC SJ-MOSFET

Abstract A superjunction (SJ) structure in power devices is compatible with low specific on-resistance and high breakdown voltage. To fabricate the SJ structure in SiC power devices, the repetition of ion implantation and epitaxial growth processes is a practical method. However, the impact of ion implantation on device performance has rarely been reported. In this study, we measured the carrier lifetime distributions in a SiC MOSFET with an SJ structure using a microscopic free carrier absorption method. Furthermore, we observed the distribution of defects via cathodoluminescence and deep levels via deep-level transient spectroscopy. We observed that Al ion implantation induced defects and reduced the carrier lifetime in the SJ structure. However, N ion implantation does not significantly induce defects. Additionally, Al ion implantation at room temperature exhibited more significant effects than implantation at 500 °C. The results can aid in controlling the carrier lifetime in SiC SJ MOSFETs.