溅射
图层(电子)
晶体管
光电子学
材料科学
薄膜晶体管
纳米技术
电气工程
薄膜
工程类
电压
作者
M. Ali,Daiki Yamashita,Hideo Isshiki
标识
DOI:10.35848/1347-4065/ad2aa5
摘要
Abstract A CuAlO 2 (CAO) bottom gate top contact p-type thin film transistor (TFT) is demonstrated. The CAO thin film is synthesized through a digitally processed DC sputtering (DPDS) technique, employing a precise layer-by-layer (LBL) deposition strategy. X-ray diffraction analysis exhibited distinct peaks beyond 600 °C. The CAO film shows a dominant phase along the (004) plane at the elevated temperature of 990 °C. The fabricated CAO p-TFT exhibits field effect mobility of 4.1 cm 2 V −1 s −1 . In addition, the p-TFT characteristics were observed even in the as-deposited CAO film. The DPDS-assisted LBL approach offers a promising pathway for controlled stacking deposition routes in the growth of CAO thin films, enabling enhanced performance and device integration.
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