The Impact of Variations in Heat Carried by Cutting Slurry on the Warpage of 300 mm Silicon Wafers

切片 薄脆饼 泥浆 材料科学 复合材料 冶金 偏移量(计算机科学) 热的 变形(气象学) 单晶硅 热膨胀 多晶硅 工程制图 温度控制 点(几何) 机械工程 温度梯度 图像扭曲
作者
Yanxiang Zhao,Yang Rui,Bo Cheng,Liguang Wang,Zhongbao Wang,Tianpei Liu,Shaolin Yang
出处
期刊:Journal of Advanced Manufacturing Systems [World Scientific]
卷期号:: 1-13
标识
DOI:10.1142/s0219686727500247
摘要

During the silicon wafer slicing process, the temperature fluctuations of the slurry will cause the deformation offset of the wire guide in the slicing equipment and the thermal expansion of the silicon ingot, leading to significant warpage on the surface of the silicon wafers, especially for large-sized wafers with a diameter of 300 mm. To address this issue, this paper adjusts the heat changes during the slicing process through optimizing the slurry temperature and slurry flow rate, thereby controlling the deformation offset of the wire guide of the slicer and the thermal deformation of the ingot to improve the warpage and surface morphology of the silicon wafers. The effects of heat generated during the slicing process and heat carried away by the slurry after cutting on the thermal expansion of the slicer wire guide and the monocrystalline silicon ingot were systematically investigated. Through design of experiments (DOE), the silicon slicing process parameters were optimized, and the optimal process conditions for obtaining lower wafer warpage were finally established. The optimal parameters are as follows: the slurry temperature at the entry point is [Formula: see text], at the middle section is [Formula: see text], and at the exit point is [Formula: see text]; the slurry flow rate at the entry point is 78 L/min, at the middle section is 130 L/min, and at the exit point is 130 L/min. After optimization, the warp value of the sliced silicon wafers was reduced from 11.34 to 10.27 [Formula: see text]m, the standard deviation was decreased from 4.54 to 4.37, and the process capability index (Cpk) was improved from 0.43 to 1.13, significantly enhancing the flatness and processing capability of the processed silicon wafers.
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