计算机科学
嵌入式系统
应用层
协议(科学)
可扩展性
Verilog公司
物理层
寄主(生物学)
链接层
接口(物质)
协议栈
字节
图层(电子)
功能验证
网络数据包
计算机硬件
计算机网络
形式验证
现场可编程门阵列
操作系统
软件
无线
无线传感器网络
病理
最大气泡压力法
气泡
生物
有机化学
化学
医学
替代医学
生态学
算法
作者
Ahmed M. Ali,Ahmed Shalaby,Sherif M. Saif,Mohamed Taher
标识
DOI:10.1109/icm56065.2022.10005400
摘要
Display Serial Interface (DSI) is a high-speed serial interface standard. It supports display and touch screens in mobile devices such as smartphones, laptops, tablets, and other platforms. DSI describes several layers that define the detailed interconnect between a host processor and a peripheral device in a mobile system. The targeted DSI protocol layer is the low-level layer in the standard which is responsible for bytes organization, error-checking information addition, and packet formulation. In this paper, we propose a constrained random Coverage-Driven Verification approach (CDV) for the DSI low-level protocol layer using Universal Verification Methodology (UVM). This approach could be the basis of a standardized Verification Intellectual Property (VIP) to test and verify the standardized DSI layer. We provide a well-established base of a reusable and scalable UVM environment that can verify the DSI protocol layer using various techniques such as error injection mechanism, System Verilog Assertions (SVA), and direct UVM sequences aim to cover the different real-life scenarios between the host processor and the peripheral device. Our results show that we can detect all inserted errors to assure the functionality of the DSI low-level protocol layer. Different real-life scenarios between the host processor and the peripheral device are covered with 100% functional coverage and 93% code coverage.
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