CMOS芯片
专用集成电路
电容器
脑-机接口
电气工程
计算机科学
去耦电容器
电压
电子工程
计算机硬件
炸薯条
工程类
心理学
精神科
脑电图
作者
John Patrick Uehlin,William Anthony Smith,Venkata Rajesh Pamula,Eric Pepin,Steve I. Perlmutter,Visvesh Sathe,Jacques C. Rudell
出处
期刊:IEEE Journal of Solid-state Circuits
[Institute of Electrical and Electronics Engineers]
日期:2020-05-16
卷期号:55 (7): 1749-1761
被引量:55
标识
DOI:10.1109/jssc.2020.2991524
摘要
A single-chip, bidirectional brain-computer interface (BBCI) enables neuromodulation through simultaneous neural recording and stimulation. This article presents a prototype BBCI application-specified integrated circuit (ASIC) consisting of a 64-channel time-multiplexed recording frontend, an area-optimized four-channel high-voltage compliant stimulator, and electronics to support the concurrent multichannel stimulus artifact cancellation. Stimulator power generation is integrated on a chip, providing ±11-V compliance from low-voltage supplies with a resonant charge pump. Highfrequency (~3 GHz) self-resonant clocking is used to reduce the pumping capacitor area while suppressing the associated switching losses. A 32-tap least mean square (LMS)-based digital adaptive filter achieves 60-dB artifact suppression, enabling simultaneous neural stimulation and recording. The entire chip occupies 4 mm 2 in a 65-nm low power (LP) process and is powered by 2.5-/1.2-V supplies, dissipating 205 μW in recording and 142 μW in the stimulation and cancellation back-ends. The stimulation output drivers achieve 31% dc-dc efficiency at a maximum output power of 24 mW.
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