计算机科学
敏捷软件开发
软件工程
嵌入式系统
开源
软件开发
软件
测试驱动开发
考试(生物学)
重新使用
上市时间
Java
作者
Paul N. Whatmough,Marco Donato,Glenn G. Ko,Sae Kyu Lee,David Brooks,Gu-Yeon Wei
出处
期刊:IEEE Micro
[Institute of Electrical and Electronics Engineers]
日期:2020-07-01
卷期号:40 (4): 32-40
被引量:4
标识
DOI:10.1109/mm.2020.2995809
摘要
The current trend for domain-specific architectures has led to renewed interest in research test chips to demonstrate new specialized hardware. Tapeouts also offer huge pedagogical value garnered from real hands-on exposure to the whole system stack. However, success with tapeouts requires hard-earned experience, and the design process is time consuming and fraught with challenges. Therefore, custom chips have remained the preserve of a small number of research groups, typically focused on circuit design research. This article describes the CHIPKIT framework: a reusable SoC subsystem which provides basic IO, an on-chip programmable host, off-chip hosting, memory, and peripherals. This subsystem can be readily extended with new IP blocks to generate custom test chips. Central to CHIPKIT is an agile RTL development flow, including a code generation tool called VGEN. Finally, we discuss best practices for full-chip validation across the entire design cycle.
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