Investigation to the Carrier Transport Properties in Heterojunction-Channel Amorphous Oxides Thin-Film Transistors Using Dual-Gate Bias

The carrier transport properties in amorphous oxide semiconductor (AOS) heterojunction thin-film transistors (TFTs) are investigated by using dual gates to control the channel of bilayer AOSs. The mobility of such heterojunction channel exhibited distinct dependences on top-gate (TG) voltage ( $V_{\text {TG}}$ ) and bottom-gate (BG) voltage ( $V_{\text {BG}}$ ) The mobility was well maintained in TG mode, where $V_{\text {TG}}$ was in line with the build-in electric field of the electron potential well (PW) formed at the heterojunction interface. In contrast, an increased $V_{\text {BG}}$ gradually reduced the high mobility to the level of a single layer channel, since a high $V_{\text {BG}}$ in the opposite direction of PW could eliminate the PW. This experimentally clarifies that the high-mobility transport path of AOS heterojunction channel locates in the interface PW and its operation demands a proper gate field direction. This were directly consolidated by the disclosed unique capacitance-voltage characteristics.